1. Field of the Invention
This invention relates generally to computer storage and, more particularly, to systems and methods for resolving memory address collisions.
2. Description of the Related Art
When a memory is accessed to read or write data, a read memory address or write memory address is received by the memory to read from the read address or write to the write memory address, respectively. Typically, if data is read from and written to the same location in memory, the memory outputs indeterministic (i.e., erroneous) data. Since indeterministic data is unpredictable, the indeterministic data creates unpredictability in downstream logic. For example, if erroneous data is fed into an adder within a microprocessor, the adder will output erroneous results.
To avoid having the erroneous data corrupt any downstream state machines, logic is typically implemented external to the memory to handle the indeterministic data. However, the inclusion of the external logic to handle the indeterministic data slows the access of data and requires more integrated logic and space on hardware that accesses the data.
In view of the foregoing, there is a need to provide faster and simpler systems and methods to resolve indeterministic data from memory address collisions.